GaN Wafer

We provide GaN wafer products.

  • Accepts small orders
  • Notable for use in power LSI, high-brightness LEDs, and lasers
  • High quality (few crystal defects)
  • Low price (compared to other companies)

GaN Substrate

Item Specification
Diameter 51.0 mm ± 0.3 mm 100.2 mm±0.3 mm
Thickness 490 µm ± 30 µm 540 µm ± 30 µm
Plane Orientation (0001) Ga-Face c-plane
TTV (5 mm edge exclusion) ≤15 µm ≤30 µm
Warp (5 mm edge exclusion) ≤20 µm ≤80 µm
Bow (5 mm edge exclusion) -10 µm to +5 µm -40 µm to +20 µm
Electrical Characteristics Type Resistivity
N-type (Si) ≤0.02 Ω·cm
UID ≤0.2 Ω·cm
Semi-Insulating (Carbon) >1E8 Ω·cm
Grade Density (pits/cm2) 2" (pits) 4" (pits)
Production ≤0.5 ≤10 ≤40
Research ≤1.5 ≤30 ≤120
Dummy ≤2.5 ≤50 ≤200

GaN Substrate (Square)

Item Specification
Size (10 ± 0.5) × (15 ± 0.5) mm2
Customized Size
Thickness 400 ± 25 µm
Plane Orientation C-plane (0001) off-angle toward M-axis
0.35 ± 0.15° or 0.55 ± 0.15°
TTV ≤10 µm
BOW ≤10 μm
Type UID N-type (Si) Semi-Insulating (Carbon)
Ga face surface roughness <0.3 nm (10 × 10 μm)
N face surface roughness Etched (0.5–1.5 µm); Polished (<0.3 nm)
Dislocation Density <1 × 106 cm-2
(002) FWHM ≤70 arcsec
(102) FWHM ≤70 arcsec
Macro defect density(hole) <0.3 cm-2
Effective Area >90%

GaN Template (φ2 inch)

Item Specification
Diameter φ50.8 mm ± 0.1 mm
GaN Film Thickness 4 µm, 10–25 µm
Oriented Plane C-plane (0001) ± 0.5°
Type UID N-type (Si)
Orifura Orientation. Length Orifura orientation (1-100). Orifura length 30 mm ± 1 mm
Electrical Resistivity (300 K) <0.5 Ω·cm <0.05 Ω·cm
Dislocation Density 5 × 108 cm2
Substrate Structure GaN/Sapphire Wafer (0001) Surface
Effective Area More than 90%
Surface Finish Ga side: CMP finish. N side: Fine grinding (Option: Optical mirror finish)

GaN Template (φ4 Inches)

Item Specification
Diameter φ100 mm ± 0.1 mm
GaN Film Thickness 4 µm, 10–25 µm
Oriented Plane C-plane (0001) ± 0.5°
Conductivity Type N-type (Undoped)
Orifura Orientation. Length Orifura orientation (1–100). Orifura length 30 mm ± 1 mm
Electrical Resistivity (300 K) <0.5 Ω·cm
Transfer Defect Density Below 5 × 108 pcs/cm2
Substrate Structure GaN/Sapphire Wafer (0001) Surface
Effective Area More than 90%
Surface Finish Ga side: CMP finish. N side: Fine grinding (Option: Optical mirror finish)

2-inch GaN-on-Sapphire Blue/Green LED Wafer

Substrate Type Flat Sapphire
Polish Single Side Polished (SSP)/Double Side Polished (DSP)
Dimension 50.8 ± 0.2 mm
Orientation C-plane (0001) off angle toward M-axis 0.2 ± 0.1°
Thickness 430 ± 25 mm
Epilayer Structure 0.2 μm pGaN / 0.5 μm MQWs / 2.5 μm nGaN / 2.0 μm uGaN
Thickness 5.5 ± 0.5 μm
Roughness(Ra) <0.5 nm
Dislocation density <5 × 108 cm2
Wavelength Blue LED Green LED
465 ± 10 nm 465 ± 10 nm
Wavelength FWHMs <25 nm <40 nm
Chip Performance Cut-in Voltage @ 1μA 2.3–2.5 V 2.2–2.4 V
Useable Area >90% (Excluding edge and macro defects)
Package Packaged in a cleanroom in a single wafer container

4-inch GaN-on-Sapphire Blue/Green/Red LED Wafer

Substrate Type Flat Sapphire
Polish Single Side Polished (SSP)/Double Side Polished (DSP)
Dimension 100 ± 0.2 mm
Orientation C-plane (0001) off angle toward M-axis 0.2 ± 0.1°
Thickness 650 ± 25 μm
Epilayer Structure 0.2 μm pGaN / 0.5 μm MQWs / 2.5 μm nGaN / 2.0 μm uGaN
Thickness 5.5 ± 0.5 μm
Roughness(Ra) <0.5 nm
Dislocation density <5 × 108 cm2
Wavelength Blue LED Green LED Red LED
465 ± 10 nm 525 ± 10 nm 630 ± 10 nm
Wavelength FWHMs <25 nm <40 nm
Chip Performance Cut-in voltage@1μA 2.3–2.5 V 2.2–2.4 V
Useable Area >90% (edge and macro defects exclusion)
Package Packaged in a cleanroom in a single wafer container

6-inch GaN-on-Sapphire Blue/Green/Red LED Wafer

Substrate Type Flat Sapphire
Polish Single Side Polished (SSP)/Double Side Polished (DSP)
Dimension 150 ± 0.2 mm
Orientation C-plane (0001) off angle toward M-axis 0.2 ± 0.1°
Thickness 1300 ± 25 μm
Epilayer Structure 0.2 μm pGaN / 0.5 μm MQWs / 2.5 μm nGaN / 2.0 μm uGaN
Thickness 6.9 ± 0.5 μm
Roughness (Ra) <0.5 nm
Dislocation density <5 × 108 cm2
Wavelength Blue LED Green LED Red LED
475 ± 3 nm 521 ± 5 nm 630 ± 8 nm
Wavelength FWHMs <25 nm <40 nm
Chip Performance Cut-in voltage @ 1 μA 2.3–2.5 V 2.2–2.4 V
Useable Area >90% (edge and macro defects exclusion)
Package Packaged in a cleanroom in a single wafer container